Curve tracing is a pin-to-pin electrical verification technique to correlate or to verify the electrical failure mode of an Integrated Chip (IC) tested on an Advanced Test Equipment (ATE). A curve tracer or parametric analyzer equipment is typically used to view the IV characteristic (Current vs Voltage) on a failure pin as specified by the tester. Curve tracing of all the input, output, Vdd and Vss pins may be necessary at times during analysis.
One analysis technique or method for curve tracing is to fabricate a PCB board mounted with an IC socket and connecting each of the pins of the IC to a connector. Ribbon cables are used to electrically connect the connector to a switchboard. The switchboard consists of multiple switches, each connecting to individual pins on the mounted IC package. The switchboard is connected to the curve tracer. This is currently the most common setup in the Failure Analysis (FA) lab. A detailed description of this typical setup of using a switchboard is provided below.
As illustrated in FIG. 1, a typical switchboard 102 is connected to the curve tracer 104 on an ATE and a PCB socket 106 (an IC socket 108 mounted to a PCB 110). The PCB socket 106 is connected to the switchboard 102 using a ribbon cable 112. An IC sample to be curve traced is inserted on the IC socket 108 on the PCB 110. Each individual pin of the IC socket 108 is electrically connected to a neutral or middle terminal of a three-way switch, eg. 114. The scanning voltage output 116 of the ATE curve tracer 104 is connected to a terminal (+) of each of the three-way switches, eg. 114, while the sensing input 118 of the ATE curve tracer 104 is connected to a terminal (−) of each of the three-way switches, eg. 114.
The condition for curve tracing is then set by electrically connecting the neutral or middle terminal of the three-way switches, eg. 114, to either the scanning voltage output 116 or the sensing input 118 of the ATE curve tracer 104. An example of such a condition is to ground the sensing input 118 and to connect all the Vss pins of a particular IC chip to the sensing input and to connect all Vdd pins of the chip to a scanning voltage output 116 of the ATE curve tracer 104. Another example is to connect all Vss pins to ground and trace each pin by connecting the pin to a scanning voltage output 116 of the ATE curve tracer 104. Additional connectors, eg. 120, may be used to provide extra biasing for curve tracing in the event where the ATE curve tracer 104 is not able to provide a required level of voltage through the scanning voltage output 116 to any individual pin of the IC socket 108. The IV curve 122 is either remembered by the tester or stored for each pin (or a few pins at a time).
The limitations of using the current typical setup include that curve tracing can only be done on one IC sample at a time. Thus, comparison to a reference IC sample requires the removal of a test IC sample and the insertion of the reference IC sample on a single socket 108. At the same time, only one or a few pins may be traced on the same IC sample at any one time. There is also a need to remember the IV curve for each or several pins when making a comparison. This is not productive for comparison between pins numbering more than one hundred, for example. It is also not possible to curve trace all pins in a short time and therefore, only specific pins are curve traced. Normally, specific pins are traced according to a datalog with the assumption that the test coverage is 100%. Multiple insertion of IC samples and possible mishandling may also lead to increased chances of bending the IC leads as well leading to increasing the chances-of Electro-Static Discharge (ESD).